Call for Papers: Work-in-Progress session

The Work-in-Progress (WiP) session at RTAS 2016 is dedicated to new and on-going research in the field of real-time and embedded systems. Authors are invited to submit short papers describing ongoing, unpublished work in all areas of real-time and embedded technology, including applications, systems, tools, methodologies, foundations, wireless sensor networks, and hardware-software co-design. In keeping with the spirit of the main symposium, submissions with an emphasis on systems and application aspects are especially encouraged.

The WiP session provides researchers and developers with an opportunity to discuss evolving and early-stage ideas, and to solicit feedback from the real-time systems community at large. Authors of all accepted papers will be required to give a short oral presentation, followed by presenting their work at a poster session.

[The WiP-and-demo proceedings are available here.]

List of accepted papers

  1. Towards Parallelizing Legacy Embedded Control Software Using the LET Programming Paradigm
    Julien Hennig, Hermann von Hasseln, Hassan Mohammad, Stefan Resmerita, Stefan Lukesch and Andreas Naderlinger
  2. Towards Correct Transformation: From High-Level Models to Time-Triggered Implementations
    Hela Guesmi, Belgacem Ben Hedi, Simon Bliudze, Mathieu Jan and Saddek Bensalem
  3. Slot-Level Time-Triggered Scheduling on COTS Multicore Platform with Resource Contentions
    Ankit Agrawal, Gerhard Fohler, Jan Nowotsch, Sascha Uhrig and Michael Paulitsch
  4. Scheduling of Multi-Threaded Tasks to Reduce Intra-Task Cache Contention
    Corey Tessler and Nathan Fisher
  5. I/O contention aware mapping of multi-criticalities real-time applications over many-core architectures
    Laure Abdallah, Matheu Jan, Jérôme Ermont and Christian Fraboul
  6. Memory-aware Response Time Analysis for P-FRP Tasks
    Xingliang Zou and Albert Cheng
  7. Cache Persistence Aware Response Time Analysis for Fixed Priority Preemptive Systems
    Syed Aftab Rashid, Geoffrey Nelissen and Eduardo Tovar
  8. An Optimizing Framework for Real-time Scheduling
    Sakthivel Manikandan Sundharam, Sebastian Altmeyer and Nicolas Navet
  9. Preliminary Performance Evaluation of HEF Scheduling Algorithm
    Carlos A. Rincon and Albert M. K. Cheng
  10. Using Linked List in Exact Schedulability Tests for Fixed Priority Scheduling
    Jiaming Lv, Xingliang Zou, Albert M. K. Cheng and Yu Jiang
  11. Online Semi-Partitioned Multiprocessor Scheduling of Soft Real-Time Periodic Tasks for QoS Optimization
    Behnaz Sanati and Albert Cheng
  12. Towards Worst-Case Bounds Analysis of the IEEE 802.15.4e
    Harrison Kurunathan, Ricardo Severino, Anis Koubaa and Eduardo Tovar

Topics of Interest

Topics of particular interest include, but are not limited to:

  • Applications and case studies
  • Runtime environment, OS, and middleware
  • Adaptive systems
  • Analysis, simulation, and debugging tools
  • Cloud and distributed computing
  • Composition and component-based systems
  • Computer architectures and microprocessors
  • Formal methods
  • Hardware/software co-design
  • Many-core systems
  • Multi-criticality systems
  • Multicore and GPU computing
  • Power-, thermal-, and energy-aware computing
  • Programming languages and compilers
  • Real-time databases
  • Scheduling and schedulability analysis
  • SOCs, FPGAs, and reconfigurable systems
  • Software engineering
  • Execution-time analysis (static, measurement-based, and probabilistic)
  • Storage systems
  • Synchronization
  • System synthesis and optimization
  • Testing, validation, and certification
  • Virtualization and isolation
  • Wireless communications
  • Tools

Submission of Papers

This year, the organisation of the submissions will be slightly different from past years. Every author is required to submit two separated documents:

  1. A short paper of 2 to 4 pages in the IEEE 10-point, two-column conference format, including all references and appendices. The submitted paper must be original material that has neither been previously published nor is currently under review by another conference or journal. Submissions will be refereed for quality and relevance. Submissions that fail to comply with the formatting requirements will not be reviewed.
  2. A poster abstract that will appear in the main proceedings. These abstracts must include a conventional header with the title of the presentation and the names and affiliations of the authors. The header must be followed by approximately 300 words (i.e. about half page) that summarize in one or two paragraphs the context of the study and the innovative aspect of the proposed solutions. To avoid doubling up the references and skewing citation count, it is extremely important to note that these abstracts must *not* contain references nor acknowledgments! All references and acknowledgements will be removed from the document before its publication in the main proceedings.

All papers must be submitted electronically in PDF. LaTeX and MS Word templates may be found here.

Submission page is now closed.

Please submit the camera-ready version of your paper (and abstract): Follow this link

Authors of accepted papers are expected to give a brief presentation. Instructions for preparing final copy and presentations will be given when the paper is accepted. By submitting a paper, the authors agree and confirm that neither this paper nor a version close to it is under submission or will be submitted elsewhere before notification by RTAS 2016, and if accepted, at least one author will register for the conference and present the work in person at the Work-in-Progress session. Authors of accepted papers will also present a poster in the reception held on 12 April, 2016.

Program Committee

Borislav Nikolic, CISTER/INESC TEC and ISEP, Portugal
Björn Brandenburg, Max Planck Institute for Software Systems, Germany
David Bol, Microelectronics laboratory – ICTEAM institute, Université catholique de Louvain, Belgium
Benny Akesson, CISTER/INESC TEC and ISEP, Portugal
Leandro Indrusiak, University of York, U.K.
Andrea Marongiu, Integrated Systems Laboratory, ETH, Swiss
Paolo Burgio, University of Modena, Italy
Dakshina Dasari Research and Technology Centre at Robert Bosch, India
Gurulingesh Raravi, Distributed and Mobile Computing group in Xerox Research Center India
Mircea Negrean, IAV GmbH, Germany

Please contact Vincent Nelis with any questions or concerns.